Editing N900 Hardware Hacking/serial dump
Warning: You are not logged in.
Your IP address will be recorded in this page's edit history.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
- | |||
NOLO X-Loader (v1.4.14, Apr 22 2010) | NOLO X-Loader (v1.4.14, Apr 22 2010) | ||
Secondary image size 109384 | Secondary image size 109384 | ||
Booting secondary | Booting secondary | ||
- | [ 0.002] Nokia OMAP Loader v1.4.14 (Apr 22 2010) running on Nokia N900 F5 (RX-51) | + | [ 0.002] Nokia OMAP Loader v1.4.14 (Apr 22 2010) running on Nokia N900 F5 (RX- |
+ | 51) | ||
[ 0.014] I2C v3.12 | [ 0.014] I2C v3.12 | ||
[ 0.033] System DMA v4.0 | [ 0.033] System DMA v4.0 | ||
Line 38: | Line 38: | ||
[ 0.000000] Initializing cgroup subsys cpu | [ 0.000000] Initializing cgroup subsys cpu | ||
- | [ 0.000000] Linux version 2.6.28-omap1 (bifh7@maemo-bifh-27) (gcc version 4.2.1) #1 PREEMPT Thu Apr 15 09:47:09 EEST 2010 | + | [ 0.000000] Linux version 2.6.28-omap1 (bifh7@maemo-bifh-27) (gcc version 4.2 |
+ | .1) #1 PREEMPT Thu Apr 15 09:47:09 EEST 2010 | ||
[ 0.000000] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c5387f | [ 0.000000] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c5387f | ||
- | [ 0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction | + | [ 0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction ca |
+ | che | ||
[ 0.000000] Machine: Nokia RX-51 board | [ 0.000000] Machine: Nokia RX-51 board | ||
[ 0.000000] Memory policy: ECC disabled, Data cache writeback | [ 0.000000] Memory policy: ECC disabled, Data cache writeback | ||
[ 0.000000] OMAP3430 ES3.1 | [ 0.000000] OMAP3430 ES3.1 | ||
[ 0.000000] SRAM: Mapped pa 0x40200000 to va 0xe3000000 size: 0x100000 | [ 0.000000] SRAM: Mapped pa 0x40200000 to va 0xe3000000 size: 0x100000 | ||
- | [ 0.000000] VRAM: 5357568 bytes at 0x8f578000. (Detected 868352 at 0x8f9c0000) | + | [ 0.000000] VRAM: 5357568 bytes at 0x8f578000. (Detected 868352 at 0x8f9c0000 |
- | [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total | + | ) |
- | [ 0.000000] Kernel command line: init=/sbin/preinit ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD, | + | [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pag |
+ | es: 65024 | ||
+ | [ 0.000000] Kernel command line: init=/sbin/preinit ubi.mtd=rootfs root=ubi0: | ||
+ | rootfs rootfstype=ubifs rootflags=bulk_read,no_chk_data_crc rw console=ttyMTD,lo | ||
+ | g console=tty0 snd-soc-rx51.hp_lim=42 snd-soc-tlv320aic3x.hp_dac_lim=6 | ||
[ 0.000000] Clocking rate (Crystal/DPLL/ARM core): 19.2/332/500 MHz | [ 0.000000] Clocking rate (Crystal/DPLL/ARM core): 19.2/332/500 MHz | ||
[ 0.000000] Reprogramming SDRC | [ 0.000000] Reprogramming SDRC | ||
[ 0.000000] GPMC revision 5.0 | [ 0.000000] GPMC revision 5.0 | ||
- | [ 0.000000] IRQ: Found an INTC at 0xd8200000 (revision 4.0) with 96 | + | [ 0.000000] IRQ: Found an INTC at 0xd8200000 (revision 4.0) with 96 interrupt |
+ | s | ||
[ 0.000000] Total of 96 interrupts on 1 active controller | [ 0.000000] Total of 96 interrupts on 1 active controller | ||
[ 0.000000] OMAP34xx GPIO hardware version 2.5 | [ 0.000000] OMAP34xx GPIO hardware version 2.5 | ||
Line 64: | Line 71: | ||
[ 0.000000] Memory: 128MB 128MB = 256MB total | [ 0.000000] Memory: 128MB 128MB = 256MB total | ||
[ 0.000000] Memory: 245052KB available (3220K code, 396K data, 144K init) | [ 0.000000] Memory: 245052KB available (3220K code, 396K data, 144K init) | ||
- | [ 0.000000] SLUB: Genslabs=8, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, | + | [ 0.000000] SLUB: Genslabs=8, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, No |
+ | des=1 | ||
[ 0.000000] Calibrating delay loop... 499.92 BogoMIPS (lpj=1949696) | [ 0.000000] Calibrating delay loop... 499.92 BogoMIPS (lpj=1949696) | ||
[ 0.000000] Security Framework initialized | [ 0.000000] Security Framework initialized | ||
Line 94: | Line 102: | ||
[ 1.274871] i2c_omap i2c_omap.2: bus 2 rev3.12 at 100 kHz | [ 1.274871] i2c_omap i2c_omap.2: bus 2 rev3.12 at 100 kHz | ||
[ 1.275˜� | [ 1.275˜� | ||
- | |||
- | |||
- |
Learn more about Contributing to the wiki.