N900 Hardware Schematic
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=Page 2= | =Page 2= | ||
- | D4800 - OMAP3430 - [[N900 Hardware CPU]] | + | * D4800 - OMAP3430 - [[N900 Hardware CPU]] |
- | N5820 - Camera cover switch | + | * N5820 - Camera cover switch |
- | N5801/2 - Main/secondary camera switches (Digital, switch CSI_A_B(3:0) bus) | + | * N5801/2 - Main/secondary camera switches (Digital, switch CSI_A_B(3:0) bus) |
- | N7001 - LIS302DL - [[N900 Hardware Accelerometer]] | + | * N7001 - LIS302DL - [[N900 Hardware Accelerometer]] |
- | N5810 - - [[N900 Hardware Flash]] | + | * N5810 - - [[N900 Hardware Flash]] |
+ | =Page 3= | ||
+ | * N5210 - uSD hotswap detector | ||
+ | * D4800 - OMAP3430 - [[N900 Hardware CPU]] | ||
+ | * D5000 - Combo memory - 64M*32 DDR, 128M*16 Flash. (POP?) | ||
+ | * D5200 - eMMC 32Gb. | ||
+ | =Page 4= | ||
A crossreference. | A crossreference. |
Revision as of 22:10, 16 June 2010
An N900 schematic appears to be at [1]
This might not be the exact version of the schematic used to make the phone.
Revision is given as 2JH_21A on the schematic. However, the pictured PCB in the schematic is 2JH_20 - see above the third row from the right keys. A dissasembled purchased n900 showed a revision number of 2JH_21[2].
Page 2
- D4800 - OMAP3430 - N900 Hardware CPU
- N5820 - Camera cover switch
- N5801/2 - Main/secondary camera switches (Digital, switch CSI_A_B(3:0) bus)
- N7001 - LIS302DL - N900 Hardware Accelerometer
- N5810 - - N900 Hardware Flash
Page 3
- N5210 - uSD hotswap detector
- D4800 - OMAP3430 - N900 Hardware CPU
- D5000 - Combo memory - 64M*32 DDR, 128M*16 Flash. (POP?)
- D5200 - eMMC 32Gb.
Page 4
A crossreference.
- Gaia - the twl4030 main power supply and audio codec chip. See N900_Hardware_Power_management.
- Rapuyama - The main phone chipset.
- Battery monitor chip BQ27200. See N900 Hardware Charge Meter.
- Battery charger/boost chip BQ24150. See N900 Hardware Battery Charger
- USB PHY - NXP1707A. See N900 Hardware USB PHY